https://yestino.com/entities/mxfp8-45c001Every event involving MXFP8enhttps://yestino.com/events/ciflow-xpu-194864-inductor-use-inline-asm-hop-in-mxfp8-neste-748495https://yestino.com/events/ciflow-xpu-194864-inductor-use-inline-asm-hop-in-mxfp8-neste-748495Thu, 27 Aug 2026 09:35:11 GMTThe MXFP8 nested-reduction test directly called the private cvt_e8m0_rceil prim, whose lowering only supports NVIDIA SM100+. Sources: PyTorch Releases