<?xml version="1.0" encoding="UTF-8"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Yestino - The Signal · Use Inline ASM HOP</title><link>https://yestino.com/entities/use-inline-asm-hop-4ab0ba</link><description>Every event involving Use Inline ASM HOP</description><language>en</language><atom:link href="https://yestino.com/entities/use-inline-asm-hop-4ab0ba/feed.xml" rel="self" type="application/rss+xml"/><item><title>ciflow/xpu/194864: [inductor] Use Inline ASM HOP in MXFP8 nested reduction test</title><link>https://yestino.com/events/ciflow-xpu-194864-inductor-use-inline-asm-hop-in-mxfp8-neste-748495</link><guid isPermaLink="true">https://yestino.com/events/ciflow-xpu-194864-inductor-use-inline-asm-hop-in-mxfp8-neste-748495</guid><pubDate>Thu, 27 Aug 2026 09:35:11 GMT</pubDate><description>The MXFP8 nested-reduction test directly called the private cvt_e8m0_rceil prim, whose lowering only supports NVIDIA SM100+.
Sources: PyTorch Releases</description></item></channel></rss>