ciflow/trunk/201326: [Inductor] Reuse identical custom-op layout constraints

What happened

Summary: Summary Reuse prepared inputs when the same IR value needs identical exact strides. We observed lower peak memory in a workload using this pattern. Problem Some attention workloads pass the same tensor as both K and V. Independent argument preparation can materialize it twice. Minimal CUDA reproducer on this branch: torch.Tensor: print("shared buffer:", k.data_ptr() == v.data_ptr()) return k + v pair.regist…

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